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Enhanced High-Temperature Reliability of Wire-Bonded 3D SiC Chip Packaging Using Patterned Ti/TaSi₂/Pt Metallization and SiO₂ Insulation
Journal article   Peer reviewed

Enhanced High-Temperature Reliability of Wire-Bonded 3D SiC Chip Packaging Using Patterned Ti/TaSi₂/Pt Metallization and SiO₂ Insulation

Jiaqi Shi, Buddhi S. Lamsal and Feng Li
IEEE transactions on components, packaging, and manufacturing technology (2011), pp.1-1
05/27/2026

Abstract

Bonding Dies electronic packaging high temperature Metallization Packaging Silicon carbide silicon carbide (SiC) Substrates three-dimensional integrated circuit (3D IC) Wire wire bonding Wires Wiring Aging
This paper presents an improved wire-bonding-based three-dimensional (3D) silicon carbide (SiC) integrated circuit (IC) packaging structure designed for high-temperature operation up to 600 °C. The work targets packaging of SiC logic and memory chips, addressing the need for reliable system-level integration in extreme environments such as aerospace propulsion control and planetary surface exploration. A tantalum silicide (TaSi₂) layer was introduced between titanium (Ti) and platinum (Pt) layers to act as a diffusion barrier against oxygen ingress and gold interdiffusion. In addition, a silicon dioxide (SiO₂) insulation layer was incorporated to suppress leakage currents. Furthermore, patterned metallization was implemented to replicate the pad geometry of practical SiC IC devices. During the 600 °C thermal aging test, daisy chain resistance decreased from approximately 4.7 Ω to 3.2 Ω and stabilized. The wire pull strength stabilized at about 3.7 gram-force (gf) after 2 days of thermal exposure. The die shear strength for chip-to-substrate attachment increased from 11.5 kilogram-force (kgf) to approximately 14 kgf. The die shear strength for chip-to-chip attachment remained stable at around 10.5 kgf. All measured pull and shear strengths satisfied MIL-STD-883 Methods 2011.9 and 2019.9, confirming high interconnect integrity. These results demonstrate the feasibility of a 3D wire-bonded SiC IC packaging platform with Ti/TaSi₂/Pt metallization and SiO₂ insulation, enabling long-duration, high-temperature operation of SiC logic and memory systems in harsh environments.
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doi.org/10.1109/TCPMT.2026.3697993View

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