3D Stacking of SiC Integrated Circuit Chips with Gold Wire Bonded Interconnects for Long-Duration High-Temperature Applications

Journal article

Peer reviewed

IEEE Transactions on Components Packaging and Manufacturing Technology

2022

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Title: 3D Stacking of SiC Integrated Circuit Chips with Gold Wire Bonded Interconnects for Long-Duration High-Temperature Applications
Creators: Feng Li
Publication Details: IEEE Transactions on Components Packaging and Manufacturing Technology
Identifiers: 996631143001851
Academic Unit: Electrical and Computer Engineering
Language: English
Resource Type: Journal article