Generating verifiable microprocessors state machine code with HDL design tools

Conference paper

Richard W Wall and Laurelie R Wall

29th Annual Conference of the IEEE Industrial Electronics Society

2004

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Title: Generating verifiable microprocessors state machine code with HDL design tools
Creators: Richard W Wall - University of Idaho
Laurelie R Wall
Conference: 29th Annual Conference of the IEEE Industrial Electronics Society
Identifiers: 996631152201851
Academic Unit: University of Idaho
Language: English
Resource Type: Conference paper