Abstract
Through-silicon-carbide vias (TSiCV) is a key enabling technology for three-dimensional (3D) integration of silicon carbide (SiC) integrated circuits intended for extremeenvironment applications such as Venus surface exploration. In these environments, conventional copper-based interconnects face challenges related to oxidation, diffusion, and long-term reliability at elevated temperatures. This work presents a full-wave electromagnetic simulation study of gold-filled TSiCVs in SiC substrates, focusing on geometry- and temperature-dependent electrical tradeoffs relevant to high-temperature operation. Using ANSYS HFSS, TSiCVs with radii of5 \mu \mathrm{~m}and10 \mu \mathrm{~m}and a depth of100 \mu \mathrm{~m}are analyzed over a frequency range of1-50 \mathrm{GHz}at temperature of20^{\circ} \mathrm{C}and600^{\circ} \mathrm{C} . Scattering parameters and extracted resistance and capacitance values are used to quantify signal-integrity and power-delivery-relevant trends. The results show that increasing via radius reduces\mathbf{A C}resistance and temperature sensitivity but significantly increases capacitive loading, leading to tradeoffs between signal integrity and power delivery. These findings provide practical design guidance for selecting TSiCV geometries in high-temperature, mixed-signal 3D SiC IC integration.